System-level testing (SLT) involves testing an entire device, rather than individual components of the device. If the device passes a battery of system-level tests, it is assumed that the individual components of the device are operating properly. SLT has become more prevalent as the complexity of, and number of components in, devices have increased. For example, a chip-implemented system, such as an application-level integrated circuit (ASIC), may be tested on a system level in order to determine that components that comprise the system are functioning correctly.
SLT systems have traditionally required large footprints in order to provide sufficient testing speed and throughput. For example, some SLT systems can occupy spaces measured in dozens of square meters.